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    Real Time Head Detection for Embedded Vision Modules

    TitleReal Time Head Detection for Embedded Vision Modules
    Publication TypeConference Paper
    Año de publicación2007
    AutoresGardel, A, Bravo, I, Jimenez, P, Lazaro, JL, Torquemada, A
    Idioma de publicaciónEnglish
    Conference Name2007 IEEE International Symposium on Intelligent Signal Processing2007 IEEE International Symposium on Intelligent Signal Processing
    Páginas1 - 6
    EditorialIEEE
    Conference LocationAlcala de Henares, Spain
    Fecha de publicación10/2007
    Numero ISBN978-1-4244-0829-0
    DOI10.1109/WISP.2007.4447515
    URLhttp://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=4447515
    Abstract

    This paper shows the algorithm implementation for a FPGA based design for people counting using a low level head detection method. Different annular patterns are used to process in parallel the image and detect heads of different sizes. Preprocessing and edge extraction are also made using reconfigurable hardware. The developed system exploits hardware processing as the vision algorithm has been modified and tuned for hardware implementation using almost the 100% of area resources of a Spartan3 (1.5 Mgates) and performing in real time with similar results than other more sophisticated algorithms while using very low cost circuits.

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