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    Architecture Based on FPGA’s for Real-Time Image Processing

    TitleArchitecture Based on FPGA’s for Real-Time Image Processing
    Publication TypeBook Chapter
    Año de publicación2006
    AutoresBravo, I, Jimenez, P, Mazo, M, Lazaro, JL, Martín Gorostiza, E
    Book TitleReconfigurable Computing: Architectures and Applications
    Series TitleLecture Notes in Computer Science
    Volumen3985/2006
    ChapterArchitecture Based on FPGA’s for Real-Time Image Processing
    Páginas152-157
    Fecha de publicación08/2006
    EditorialSpringer
    CityBerlin
    Idioma de publicaciónEnglish
    ISSN0302-9743
    Numero ISBN978-3-540-36708-6
    Abstract

    In this paper an architecture based on FPGA’s for real time image processing is described. The system is composed of a high resolution (1280×1024) CMOS sensor connected to a FPGA that will be in charge of acquiring images from the sensor and controlling it too. A PC sends certain orders and parameters, configured by the user, to the FPGA. The connexion between the PC and the FPGA is made through the parallel port. On the other hand, the resolution of the captured image, as well as the selection of a window of interest inside the image, are configured by the user in the PC. Finally, a system to make the convolution between the captured image and a nxn-mask is shown.

    URLhttp://www.springerlink.com/content/p128kk7465670456/fulltext.pdf
    DOI10.1007/11802839
    AttachmentSize
    LNCS-2006-IBravo.pdf754.74 KB

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