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    Dual-Core Architecture for PLC Channel Estimator and ASCET Equalizer in a FBMC Transmultiplexer

    TitleDual-Core Architecture for PLC Channel Estimator and ASCET Equalizer in a FBMC Transmultiplexer
    Publication TypeConference Paper
    Año de publicación2019
    AutoresR.Nieto,, Mateo, R, Hernandez, A, Diaz, E
    Idioma de publicaciónEnglish
    Conference Name 24th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA)
    Páginas1342-1345
    EditorialIEEE
    Conference LocationZaragoza, España
    Fecha de publicación09/2019
    DOI10.1109/ETFA.2019.8869476

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